Training Calender

This course covers the Verilog RTL syntax and implementing the Industry standard RTL logic. The written logic is validated using Functional simulation as well as checking the behaviour by programming into standard FPGA platform

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Sl # Course Code Courses Training Mode Who Can Attend Start Date Training Location Duration Register
1 ELTP-VRTL-01 Entry Level Professional Training - Verilog RTL Design Flow Read More Full Time Fresh Graduates FEB 2020 Bangalore 12 Weeks 8hr/Day Register
2 ELTP-VRTL-PT-01 Entry Level Professional Training - Verilog RTL Design Flow Read More Part Time Course # 1

[Mon-Fri]
Pursuing Graduates

Branch:
E & C, ET, EI, EE.
Semester:
5th, 6th, 7th & 8th.
FEB, 2020 Bangalore 8 Weeks 2hr/Day Register
3 ELTP-VRTL-PT-02 Entry Level Professional Training - Verilog RTL Design Flow Read More Part Time Course # 2

Weekend Class [Saturday]
For Working Employees

Any Electronics background with logic design, basic RTL concepts.

Qualification: E & C, ET, EI, EE Working employees
JAN 2020 Bangalore 12 Weeks 3hr/day
Only on Saturday
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4 ELPT-VRTL-Int-02 Entry Level Professional Training - Verilog RTL Design Flow Read More Internship # 1

[Mon-Fri]
Any Electronics background with logic design

Qualification: B.Tech, M.Tech For 6th sem / M.Tech students

Branch: E & C, ET, EI, EE SEM: 6th, 7th & 8th
FEB 2020 Bangalore 4 Weeks 5hr/day Register
5 ELPT-VRTL-01 Entry Level Professional Training - Verilog RTL Design Flow Read More Partime Course#1 (pursuing Graduate) Mon-Fri Fresh Graduates 9th Dec, 2019 Bangalore 12 Weeks Register
6 ELPT-VRTL-01 Entry Level Professional Training - Verilog RTL Design Flow Read More Partime Course#1 (pursuing Graduate) Mon-Fri Fresh Graduates 9th Dec, 2019 Bangalore 12 Weeks Register
7 ELPT-VRTL-01 Entry Level Professional Training - Verilog RTL Design Flow Read More Partime Course#1 (pursuing Graduate) Mon-Fri Fresh Graduates 9th Dec, 2019 Bangalore 12 Weeks Register
8 ELPT-VRTL-01 Entry Level Professional Training - Verilog RTL Design Flow Read More Partime Course#1 (pursuing Graduate) Mon-Fri Fresh Graduates 9th Dec, 2019 Bangalore 12 Weeks Register
9 ELPT-VRTL-01 Entry Level Professional Training - Verilog RTL Design Flow Read More Partime Course#1 (pursuing Graduate) Mon-Fri Fresh Graduates 9th Dec, 2019 Bangalore 12 Weeks Register
10 HW-SDF-01 Schematics design flow and board bring up Read More Full Time Fresh Graduates Jan 2019 Bangalore 12 Weeks Register
11 STP-01 Short Term Projects Read More Part Time Pursuing Jan 2019 Bangalore 12 Weeks Register
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